Verilog Styles for Synthesis of Digital Systems

David R. Smith, Paul D. Franzon

Anno: 2000
Rilegatura: Paperback / softback
Pagine: 336 p.
Testo in English
Dimensioni: 185 x 243 mm
Peso: 481 gr.
  • EAN: 9780201618600
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For senior/graduate-level courses in Digital Hardware Design/Verilog. This text is designed specifically to make the cutting-edge techniques of digital hardware design more accessible to students-e.g., synthesis from high-level specifications, and field programmable gate arrays (FPGA) for many applications. The text uses a simpler language (Verilog) and standardizes the methodology to the point where seniors and first-year graduates can get medium complex designs through to gate-level simulation in a single semester.