Test Generation of Crosstalk Delay Faults in VLSI Circuits

di S. Jayanthy (Autore)

M.C. Bhuvaneswari (Autore)

Springer Verlag, Singapore, 2018

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.

• Autore: S. Jayanthy, M.C. Bhuvaneswari
• Editore: Springer Verlag, Singapore
• Anno: 2018
• Rilegatura: Paperback / softback
• Pagine: 156 p.
• Dimensioni: 235 x 155 mm
• EAN: 9789811347849

Testo in English